Funding opportunity

Pre-announcement: Japan-UK joint opportunity in semiconductor research (JST-EPSRC)

• Opportunity status: Upcoming
• Funders: Engineering and Physical Sciences Research Council (EPSRC)
• Co-funders: Japan Science and Technology Agency (JST)
• Funding type: Grant
• Total fund: £3,500,000
• Publication date: 14 March 2024
• Opening date: To be confirmed
• Closing date: To be confirmed

Last updated: 8 April 2024 - see all updates

This international joint funding opportunity will support research projects in the field of semiconductors. Projects will further develop and strengthen the network and research collaboration between UK-based and Japan-based researchers.

Applications will have a principal investigator based at a UK research organisation eligible for UKRI funding and a principal investigator based at a Japan research organisation eligible for JST funding.

We envisage funding three projects, starting November 2024. EPSRC will fund 80% of the full economic cost (FEC). Projects can be up to 42 months.

We held a webinar on 21 March 2024.

This is a pre-announcement and the information may change.

Who can apply

For support under this funding opportunity, applicants and organisations must be eligible to apply for funding from their respective country’s funding agency.

Applications will have a project lead (previously principal investigator) based at a UK research organisation eligible for UKRI funding and a project lead based at a Japan research organisation eligible for JST funding.

The expectation is that the UK project lead and associated costs for UK research would be funded by Engineering and Physical Sciences Research Council (EPSRC). The Japan-based project lead and associated costs for Japan-based research would be funded by Japan Science and Technology Agency (JST).

Before applying for funding, check the Eligibility of your organisation.

EPSRC standard eligibility rules apply. For full details, visit EPSRC’s eligibility page.

What we're looking for

Scope

Low power hardware for artificial intelligence (AI) systems

Including:

• low power design technologies and methods
• innovative architectures for improving energy efficiency
• hardware or software systems approach to low power devices
• search or generation, or both, of algorithm or architecture design space
  for energy efficiency
• 3D or 2.5D integrated circuit processes, circuits and architectures for emerging materials
  and new computing paradigms
• compatibility of AI algorithms with semiconductor hardware
• photonics to address any of these points above (meaning low power, low
  heat, more energy efficient parallel processing etc.)

Power devices, radio frequency devices, electronics

Including:

• materials, silicon carbide-related material processes, evaluation and calculation
• compound semiconductors more broadly (including GaN, Ga2O3,
  GaAs, InP, AlN, BN etc.)
• applications in power electronics, radio transmission, materials for
  photonics
• active electronics or thermal management (for example, diamond), or both

Security by design

Including:

• trusted electronics
• security architectures at the design stage so that they are intrinsically part of integrated circuits
• discrete designs to enable security as part of a package or board
• approaches for secured by design System on Chip (SoC) (for example, capability architectures for example, Morello, across SoC)
• a focus on hardware and manufacture

Semiconductor photonics

Including:

• exploring materials for heterogeneous integration, for example as a route to low power electronics (for example, photonics, silicon, compound semiconductors, nanoelectromechanical systems, microelectromechanical systems etc.)
• materials platforms for photonic integrated circuits (for example, silicon photonics, compound semiconductors, emerging materials platforms etc.)
• photonic logic
• photonic integrated circuits (PICs)
• photonic communication across chip and inter-chip (inter package)
• novel devices (for example, low power modulators, to efficient coupling to or from PICs, to specific reconfigurable devices for AI etc.)

The funding opportunity will open in May 2024. More information will be available on this page then.

How to apply

We are running this funding opportunity on the new UKRI Funding Service. You cannot apply on the Joint Electronic Submissions (Je-S) system.  We will publish full details on how to apply when the funding opportunity opens.

Contact details

Contact details

For questions related to this specific funding opportunity please contact ict.theme@epsrc.ukri.org quoting ‘EPSRC-JST Semiconductor’ in the subject line.

Enquiries can be sent to this email address. However, we will not be able to provide additional information about this funding opportunity in advance of its publication.

Additional info

Webinar for potential applicants

We held a webinar on 21 March 2024 to provide more information about the funding opportunity. Attendees were offered the option to network by exchanging contact details.

The webinar was hosted on Zoom.

Watch webinar recording (Zoom), passcode: aOy7*Sg5

Updates

• 8 April 2024
  Detailed scope added to the 'What we're looking for' section
• 8 April 2024
  Webinar recording link added to the 'Additional info' section.